What They Build
Maieutic builds a generative-AI copilot for analog IC design, intended to support early design, error detection, and trade-off exploration inside existing EDA workflows.
Why They Matter
Analog chip design remains unusually manual and talent-constrained. Maieutic matters because it attacks a productivity bottleneck inside semiconductor design rather than another application layer above it. The founding team's prior Steradian exit gives the company credibility, but the product still needs to prove that AI can compress analog design without degrading engineering quality.
Founders
Gireesh Rajendran, Ashish Lachhwani, Rakesh Kumar, Krishna Sankar
Recent Milestones
- Founders previously built Steradian Semiconductors, acquired by Renesas in 2022
- Founding team has 70+ collective patents and high-volume chip-shipping experience
- $4.15M seed round closed in July 2025, co-led by Endiya Partners and Exfinity Venture Partners
- $6M total funding disclosed by March 2026 with UTEC participation
- Early customer trials planned with analog design teams in India and Japan